PCB Via and Microvia

Via (Vertical Interconnect Access) on printed circuit board (PCB) forms electrical connections from one copper layer to another copper layer. Standard PCB boards are with mechanical drilled vias in diameter more than or equal to 0.2mm (8mil) with an aspect ratio of 8:1. With the development of high-density interconnect (HDI) PCB technology, Micro-via (/Microvia) enables designers to design more complex PCBs on smaller sizes and lighter weights. In old point, a microvia is a laser drilled via less than or equal to 0.15mm (6mil). But now people think a microvia is a hole with an aspect ratio of 1:1. Microvia is smaller Via, both in blind and buried. Vias and Microvias are copper plated holes.

 

3 Types of PCB Via

A Via on PCB consists of two pads in corresponding position on different layers of the board, that are electrically connected by a hold through the board. The hole is made conductive by electroplating (copper plating). Depending upon their functionality, there are 3 types of PCB Via, including Plated Through Hole (PTH), Blind Via and Buried via, which are drilled by CNC mechanical drilling.

  • Plated-thru Hole (PTH)

    Plated Through Hole, or Plated-thru Hole (PTH) is the most common seen type of vias in rigid PCB and flex circuit, and is actually a hole dug completely through a printed circuit board. It is the simplest type of copper plated via, and is extremely cost effective. However, it takes up more space on your PCB leaving you with a little space for your components. A plated-thru via may be at the edge of the PCB board so that it is cut in half when the board is in the routing process. This kind via calls Half-hole, or Castellated Hole, which is always used for a variety of reasons, including a half-hole board as a Module PCB that allows it’s to be soldered to another board.

  • Blind Via

    Blind via connects an outer layer to one or more inner layers but does not go through the entire PCB. Thus, buried vias are not visible from one outer layer but invisible from the other outer layer.

  • Buried Via

    Buried via connects two inner layers but does no go through to an outer layer. Thus, blind vias are invisible from any one of the outer layers.

Thru-hole only connects top and bottom layers together, it may waste routing space. Blind vias and buried vias are used to connect between layers on a PCB board to increase wiring layout density and saving PCB space; reduce layer count by widening the BGA breakout channel with a blind via. In nowadays design, PCB surface space is premium. But buried and blind vias require extra drilling, lamination and thermal press cycles, which will increase PCB cost. Thus, PCBs with blind vias and/or buried vias are always used when absolutely necessary.

For blind and buried vias on conventional FR4 PCB, not all layer-to-layer combinations are possible. UL specifies that 3 thermal press cycles are the most. For building high reliable blind via board or buried via board, MADPCB will accept to fabricate multi-layer conventional PCBs that requires equal to or less than 3 lamination and thermal press cycles.


HDI Microvia

HDI PCBs are the ones which are densely constructed and extremely small components are placed closely together to each other resulting in shorter paths between them. Usage of buried via in HDI boards can increase the component holding capacity. These buried vias are completely covered and encapsulated by the board itself. Also, talking about HDI PCB; even micro-vias are preferred. These are vias which have extremely small diameter holes and a conducting material is used on them so as to establish the connection of the pad with the other layer.

1. Microvia (Build-up Via)A blind or subsequently buried hole that is <=0.15mm [6mil] in diameter with a pad diameter that is <=0.35mm [13.8mil] and formed through laser drilling, wet/dry etching, photo imaging or conductive ink-formation followed by a plating operation.

2. Capture Land (Microvia Top Land): Land where the microvia originates; varies in shape and size based on use (i.e., component mounting, via entrance and conductor).

3. Target Land (Via Bottom Land)Land on which a microvia ends.

  • Stacked Vias

    A via formed by stacking one or more microvias on a buried via hole that provides an interlayer connection between three or more conductive layers.

  • Stacked Microvias

    A microvia formed by stacking one or more microvias on a microvia that provides an interlayer connection between three or more conductive layers.

  • Staggered Vias

    A microvia on one layer connecting to a via hole on a second layer, which are offset such that the land diameters are tangential or greater.

  • Staggered Microvias

    A set of microvias, formed on two or more different layers, which are offset such that the land diameters are tangential or greater.

  • Variable Depth Microvia/Via

    Microvias or vias formed in one operation, penetrating two or more HDI dielectric layers and terminating at one or more different layers.


Microvia Design

It is important to note that the land size for a microvia feature is determined, rather than simply selected, as discussed in the following.

HDI PCB manufacturers successfully use a wide variety of dielectrics for microvia boards, ranging from conventional glass reinforced epoxy to ultra-thin unreinforced materials such as resin coated copper foil (RCC). The product’s end-use environment and expected operating life, plus certain needed board-level attributes (e.g., dielectric withstand voltage, resin content to fill buried vias or avoid resin starvation, etc.) may require a particular dielectric type and/or thickness for the microvia layer. However, before the microvia diameter can be determined, the PCB designer must select the thickness and type of dielectric for the microvia layer of the HDI board to be built. In addition, a suitable value for the aspect ratio of the blind microvia is also needed. The aspect ratio is the ratio of the length of the hole to the dimeter of the hole (L/P). Acceptable values for aspect ratio are somewhat PCB board supplier dependent and indicative of the hole configuration the suppliers can form and plate reliably and consistently. Outer copper foil thickness should be known or estimated when design microvias. The required as-formed diameter of the microvia is calculated as the Equation as below,

Microvia Diameter = (Dielectric Thickness on Outer Layer + Outer Copper Foil Thickness) / Aspect Ratio


The target pad and capture pad diameters are determined by adding two annular ring widths and a fabrication allowance to the as-formed diameter of the microvia. The required microvia fabrication allowance is a function of material behavior and fabrication process tolerances.

Target Pad Diameter = Microvia Diameter + 2x Annular Ring Widths

Capture Pad Diameter = Microvia Diameter + 2x Annular Ring Widths

Feature Pitch and Conductor Per Channel Combinations

Feature Pitch:

0.25mm

0.5mm

0.75mm

1.0mm

1.27mm

Conventional FR-4

CW=125μm

CS=125μm

LD=700μm

No

No

No

No

Yes

Conventional FR-4

CW=125μm

CS=125μm

LD=600μm

No

No

No

Yes

Yes

High Density FR-4

CW=100μm

CS=100μm

LD=600μm

No

No

No

Yes

Yes

Next Gen FR-4

CW=60μm

CS=50μm

LD=300μm

No

Yes

Yes

Yes

Yes

Typical Microvia Lage Form Factor

CW=75μm

CS=100μm

LD=250μm

No

Yes

Yes

Yes

Yes

Typical Microvia Small Form Factor

CW=75μm

CS=75μm

LD=250μm

Yes

Yes

Yes

Yes

Yes

Next Gen Microvia

CW=50μm

CS=50μm

LD=50μm

Yes

Yes

Yes

Yes

Yes


PCB Design Tips for Vias or Microvias

Here are a few quick tips that PCB designers can consider while employing vias in design.

  • Use maximum micro via structures in your design.

  • Stacked Vias and Staggered Vias: Choose staggered instead of stacked via since the stacked via need to be filled and planarized. This process is time consuming and expensive as well.

  • Keep the aspect ratio minimum. This provides better electrical performance and signal integrity

  • Use maximum micro via structures in your design.

  • Stacked and staggered vias: Choose staggered instead of stacked vias since the stacked vias need to be filled and planarized. This process is time consuming and expensive as well.

  • Keep the aspect ratio minimum. This provides better electrical performance and signal integrity. Lower noise and crosstalk, and lower EMI/RFI.

  • Implement smaller vias. This can help you build an efficient HDI PCB since the stray capacitance and inductance gets reduced.

  • Via-in-pads must be filled, unless they reside in thermal pads.

  • The pad matrix on which a BGA will be installed may include through vias and blind vias, but all of them must be filled and planarized, otherwise solder joints will be compromised.

  • Incorporate vias in the thermal pads under QFNs to help solder flow through to conductive planes.

  • The vias ensure a secure solder joint for the thermal pad and prevent solder from floating the package during assembly, which could hamper forming good solder joints at the QFN contacts.

  • Your SMT house can compensate for a lack of through vias in a thermal pad by adding windowpane-shaped opening in the solder paste stencil above the pad, to relieve solder pooling and outgassing during assembly, but the fix is less effective than if vias were present.

  • Check for minimum clearance of traces and vias from the routed/scored edges.

  • Check the position of vias for BGA packages.

  • Via-in-pad design requires filling.

  • Dog-bone design: Separate each via from its pad with a predefined short trace covered with solder mask. Ensure there is no mask clearance for the vias under BGA.

  • The board documentation should include a drill file with tool codes and X-Y coordinates for all holes.

  • The fab drawing should include a drill chart with hole symbols on the drawing and finished hole sizes along with via tolerances.

  • The Gerber files should include via plugging holes if required.

  • Controlled depth for blind and buried vias.

Tolerances

  • Minimum outer layer annular ring: as per IPC standards

  • Minimum inner layer annular ring: as per IPC standards

  • Drill to plane clearance: 8 mils

  • Diameter: ± 3 mils preferred

  • Location: 1 mil

  • Registration: 1 mil

  • Via clearance of solder mask: 2.5 mils bigger than via pad size

  • Encroachment of solder mask onto via: via size + 3 mils

  • Anti-pad: 16 mils bigger than the hole size and plane relief preferred 8 mils

  • There may be requirements for PCB fabricators to plug, fill, or tent vias on a PCB